A reduction technique of large scale RCG interconnects in complex frequency domain

High frequency digital LSIs usually consist of many subcircuits coupled with multi-conductor interconnects embedded in the substrate. They sometimes cause serious problems of the fault switching operations due to the time-delays, crosstalks, reflections and so on. In order to solve these problems, it is very important to develop a user-friendly simulator for the analysis of LSIs coupled with interconnects. At the reduction algorithm, we first calculate the dominant poles which give the large effects to the transient response, and the corresponding residues are estimated by the least squares method. Thus, the interconnect is replaced by the equivalent circuit realizing the partial fractions.